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- March 12, 2018 | More info...
EXTRA paper presented at Latin American Test Symposium
Talk about a virtual coarse-grained reconfigurable architecture, embedded with on-demand debug and self-healing capabilities.
Field Programmable Gate Arrays (FPGAs) gain popularity as higher-level tools evolve to deliver the benefits of reprogrammable silicon to engineers and scientists at all levels of expertise. In order to use FPGAs efficiently, new CAD tools and modern architectures are needed for the growing demands of heterogeneous computing paradigms. Overlay architectures have become a popular option to support a variety of high-performance computing applications implemented on heterogeneous comput- ing platforms. However, most of these architectures cannot offer an efficient way to dynamically debug and repair them. In this paper, we propose a superimposed virtual coarse-grained recon- figurable architecture, embedded with on-demand debug and self- healing capabilities. The proposed architecture supports flexible in-circuit error detection and correction of generic Processing Elements and Virtual Channels. The debugging infrastructure is constructed on resources released by custom tailor-made CAD tools (such as parameterised configuration), making feasible to rapidly debug and repair virtual architectures with minimal use of additional FPGA resources.
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The EXTRA project has received funding from the European Union Horizon 2020 Framework Programme (H2020-EU.1.2.2.) under grant agreement number 671653.